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PLC Automation All parts · 10 pages 1 · PLC Basics & Hardware 3 · Industrial Applications 4 · Commissioning, Safety & Lab
// Chapter 22 · PLC Automation · electrician → student → engineer
PLC Automation
A PLC (Programmable Logic Controller) replaces panels of hundreds of relays with a program you can edit. This course runs from how a PLC scans, through wiring PNP/NPN sensors correctly, writing ladder logic, timers and counters, to motor control, star–delta, sequential systems, analog and PID, and commanding VFDs. Every example can be tried straight away in the simulator on the page. There are formulas with citable IDs and worked examples.
In 30 seconds
A PLC repeats three things every few milliseconds: read inputs → run the program → write outputs
Ladder: series = AND · parallel = OR · NC = NOT · a self-holding rung works like a contactor
A PNP sensor pairs with a sinking input (COM to 0 V) · NPN pairs with sourcing
STOP and emergency-stop buttons are wired NC, and critical interlocks must stay in hardware
IEC 61131-3 timers TON, TOF, TP and counters CTU, CTD work on every brand
Learning path by level
Level 1 · electrician · vocational
Wire it and write ladder logic What a PLC is, I/O wiring, ladder, self-holding, timers, counters
Fundamentals → I/O wiring → Ladder → Timers
Level 3 · engineering student · engineer
System-level design Boolean algebra, state machines, SFC, ST, response time, discrete PID, functional safety
IEC 61131-3 → SFC → Safety
Try it: a star–delta PLC in your browser
Press START (I0.1) and watch the green power flow through the ladder. Timer T1 counts 6 seconds, K2 (star) drops out, there is an 80 ms dead time, then K3 (delta) pulls in. Choose another example from the menu, or open “Edit the program” to write your own. The full simulator with worksheets is at Ladder simulator .
JavaScript is needed for the simulator
Key equations used throughout
H1 Worst-case response
t r e s p , m a x ≈ t i n + 2 t s c a n + t o u t t_{resp,max} \approx t_{in} + 2\,t_{scan} + t_{out} t res p , ma x ≈ t in + 2 t sc an + t o u t
H2 Latch rung
Q = STOP ‾ ⋅ ( START + Q ) ≡ STOP wired NC → NO contact in the program Q = \overline{\text{STOP}}\cdot(\text{START} + Q) \;\;\equiv\;\; \text{STOP wired NC → NO contact in the program} Q = STOP ⋅ ( START + Q ) ≡ STOP wired NC → NO contact in the program
H3 On-delay timer
Q T O N = I N ∧ ( E T ≥ P T ) E T ≤ P T Q_{TON} = IN \wedge (ET \ge PT) \qquad ET \le PT Q TON = I N ∧ ( ET ≥ PT ) ET ≤ PT
H4 Analog scaling
y = y m i n + ( x − x m i n ) y m a x − y m i n x m a x − x m i n y = y_{min} + (x - x_{min})\,\frac{y_{max} - y_{min}}{x_{max} - x_{min}} y = y min + ( x − x min ) x ma x − x min y ma x − y min
PLCs found in the region and their address notation
Brand (example models) Input Output Memory Software
IEC 61131-3 (standard) %IX0.0 %QX0.0 %MX0.0 CODESYS and others
Siemens (S7-1200/1500) I0.0 Q0.0 M0.0 TIA Portal
Mitsubishi (FX5U, iQ-R) X0 Y0 M0 GX Works3
Omron (CP1, NX/NJ) 0.00 100.00 W0.00 CX-Programmer / Sysmac Studio
Delta (DVP, AS) X0 Y0 M0 ISPSoft
Rockwell (Micro800, CompactLogix) _IO_EM_DI_00 / tag _IO_EM_DO_00 / tag tag CCW / Studio 5000
This course uses Siemens-style I0.0 / Q0.0 / M0.0 addresses because they are easy to read and translate directly to other brands.
Every page in this course
Part 1 PLC Basics & Hardware What a PLC is, its architecture, the scan cycle, IEC 61131 and PNP/NPN input-output wiring
CPU 22.1
What a PLC is: CPU, memory and I/O architecture, the scan cycle, scan time, IEC 61131 and choosing a PLC
What a PLC is
From relays to PLCs, architecture, the input–program–output scan, scan and response time, compact, modular and safety PLCs, PLC vs relays vs microcontrollers, and brands used in the region
24V 22.2
Wiring PLC inputs and outputs: sinking and sourcing, PNP/NPN sensors, relay vs transistor outputs, inductive loads and the 24 VDC supply
Wiring PLC inputs and outputs
24 VDC inputs per IEC 61131-2, sink vs source, 3-wire PNP/NPN and 2-wire sensors, relay, transistor and triac outputs, diodes and RC snubbers, interposing relays, 4–20 mA analog and power-supply sizing
Part 2 Programming Ladder logic, timers, counters and the five IEC 61131-3 languages, with the same program in several languages
┤├ 22.3
Ladder diagram basics: NO and NC contacts, coils, AND, OR, self-holding, SET/RESET, edges and Boolean algebra
Ladder diagram basics
Reading ladder like a relay circuit, truth tables, why a STOP button wired NC is programmed with an NO contact, double coils, rising and falling edges, and Mitsubishi, Omron, Siemens and IEC addressing
TON 22.4
IEC 61131-3 timers and counters: TON, TOF, TP, CTU, CTD and CTUD with timing diagrams and real examples
IEC 61131-3 timers and counters
On-delay, off-delay, pulse, flasher circuits, part counting, reset, high-speed counters and scan-time pitfalls
ST 22.5
PLC programming languages in IEC 61131-3: LD, FBD, ST, SFC and IL — one program in several languages, data types and when to use which
PLC programming languages in IEC 61131-3
Ladder, function block diagram, Structured Text and Sequential Function Chart, data types BOOL INT REAL TIME, user function blocks, and choosing a language
Part 3 Industrial Applications Motor control with a PLC, sequential control, analog and PID, and commanding a VFD
M 22.6
Motor control with a PLC: DOL, reversing, star–delta, I/O lists, wiring, hard-wired interlocks and contactor feedback monitoring
Motor control with a PLC
Translating contactor circuits into ladder and ST, what must stay in hardware, overload inputs, detecting welded contactors, and a complete PLC star–delta drawing
SFC 22.7
Sequential control: state machines, SFC/GRAFCET, traffic lights, sorting conveyors and batch mixing tanks
Sequential control
Designing with state diagrams, steps and transitions, implementing in ladder with SET/RESET and in ST with CASE, auto/manual modes, emergency stop and homing
PID 22.8
Analog, PID and commanding VFDs from a PLC: 4–20 mA scaling, the PID block, constant-pressure pumping and Modbus RTU
Analog, PID and commanding VFDs from a PLC
Scaling raw counts to engineering units, wire-break detection, positional PID and tuning, commanding a VFD by digital, analog and Modbus RTU, with a sample register map
Part 4 Commissioning, Safety & Lab Commissioning procedure, machine safety, troubleshooting and an in-browser ladder simulator
⚠ 22.9
PLC commissioning, machine safety and troubleshooting: loop checks, forcing, emergency stop, IEC 60204-1, ISO 13849 and documentation
PLC commissioning, machine safety and troubleshooting
Pre-power checks, point-by-point I/O tests, the dangers of forcing, stop categories 0/1/2, safety relays, PL and SIL, program backups and a troubleshooting flow
▶ 22.10
In-browser PLC ladder simulator: write a program, watch power flow, timers and counters, with ready-made examples
In-browser PLC ladder simulator
Edit the program as text, see it drawn as ladder automatically, toggle inputs and watch the scan, TON TOF CTU SET RESET and edges, with DOL, reversing, star–delta, traffic light and tank examples and worksheets
Prefixes: H overview · F fundamentals · W I/O wiring · B ladder · T timers/counters · L languages · M motors · S sequential · P analog/PID · K commissioning/safety
Find a formula
47 formulas
All pages H · Overview F · What is a PLC · scan W · I/O wiring · PNP/NPN B · Ladder basics T · Timers & counters L · IEC 61131-3 languages M · Motor control with a PLC S · Sequential control P · Analog · PID · VFD K · Commissioning & safety
H1 Worst-case response t r e s p , m a x ≈ t i n + 2 t s c a n + t o u t t_{resp,max} \approx t_{in} + 2\,t_{scan} + t_{out} t res p , ma x ≈ t in + 2 t sc an + t o u t
H2 Latch rung Q = STOP ‾ ⋅ ( START + Q ) ≡ STOP wired NC → NO contact in the program Q = \overline{\text{STOP}}\cdot(\text{START} + Q) \;\;\equiv\;\; \text{STOP wired NC → NO contact in the program} Q = STOP ⋅ ( START + Q ) ≡ STOP wired NC → NO contact in the program
H3 On-delay timer Q T O N = I N ∧ ( E T ≥ P T ) E T ≤ P T Q_{TON} = IN \wedge (ET \ge PT) \qquad ET \le PT Q TON = I N ∧ ( ET ≥ PT ) ET ≤ PT
H4 Analog scaling y = y m i n + ( x − x m i n ) y m a x − y m i n x m a x − x m i n y = y_{min} + (x - x_{min})\,\frac{y_{max} - y_{min}}{x_{max} - x_{min}} y = y min + ( x − x min ) x ma x − x min y ma x − y min
F1 Scan time t s c a n = t r e a d I + t p r o g r a m + t w r i t e Q + t c o m m / d i a g t_{scan} = t_{read\,I} + t_{program} + t_{write\,Q} + t_{comm/diag} t sc an = t re a d I + t p ro g r am + t w r i t e Q + t co mm / d ia g
F2 Program execution estimate t p r o g r a m ≈ N b i t t b i t + N w o r d t w o r d + N r e a l t r e a l t_{program} \approx N_{bit}\,t_{bit} + N_{word}\,t_{word} + N_{real}\,t_{real} t p ro g r am ≈ N bi t t bi t + N w or d t w or d + N re a l t re a l
F3 System response time t i n + t s c a n + t o u t ≤ t r e s p ≤ t i n + 2 t s c a n + t o u t t_{in} + t_{scan} + t_{out} \;\le\; t_{resp} \;\le\; t_{in} + 2\,t_{scan} + t_{out} t in + t sc an + t o u t ≤ t res p ≤ t in + 2 t sc an + t o u t
F4 Shortest pulse surely seen t p u l s e > t s c a n + t i n t_{pulse} > t_{scan} + t_{in} t p u l se > t sc an + t in
F5 I/O count with spare N I / O = ⌈ 1.2 N r e q u i r e d ⌉ ( 15–25 % spare ) N_{I/O} = \left\lceil 1.2\,N_{required} \right\rceil \quad (\text{15–25 \% spare}) N I / O = ⌈ 1.2 N re q u i re d ⌉ ( 15–25 % spare )
W1 Input current I i n ≈ V − V L E D R i n ≈ 24 − 1.2 4.7 k Ω ≈ 5 mA I_{in} \approx \frac{V - V_{LED}}{R_{in}} \approx \frac{24 - 1.2}{4.7\ \text{k}\Omega} \approx 5\ \text{mA} I in ≈ R in V − V L E D ≈ 4.7 k Ω 24 − 1.2 ≈ 5 mA
W2 Two-wire sensor compatibility I l e a k , s e n s o r ≤ I O F F , m a x V d r o p , s e n s o r ≤ 24 − V O N , m i n I_{leak,sensor} \le I_{OFF,max} \qquad V_{drop,sensor} \le 24 - V_{ON,min} I l e ak , se n sor ≤ I OFF , ma x V d ro p , se n sor ≤ 24 − V ON , min
W3 Inductive kick v L = L d i d t no suppressor: several hundred volts with a diode: V c l a m p ≈ V s u p p l y + 0.7 V v_L = L\frac{di}{dt} \qquad \text{no suppressor: several hundred volts} \qquad \text{with a diode: } V_{clamp} \approx V_{supply} + 0.7\ \text{V} v L = L d t d i no suppressor: several hundred volts with a diode: V c l am p ≈ V s u ppl y + 0.7 V
W4 24 VDC supply sizing I P S U ≥ 1.25 ( I C P U + ∑ I i n + ∑ I s e n s o r + ∑ I o u t ( simultaneous ) ) I_{PSU} \ge 1.25\left(I_{CPU} + \sum I_{in} + \sum I_{sensor} + \sum I_{out\,(\text{simultaneous})}\right) I PS U ≥ 1.25 ( I CP U + ∑ I in + ∑ I se n sor + ∑ I o u t ( simultaneous ) )
B1 AND (series) Y = A ⋅ B ST: Y : = A AND B ; Y = A \cdot B \qquad \text{ST: } Y := A \text{ AND } B; Y = A ⋅ B ST: Y := A AND B ;
B2 OR (parallel) Y = A + B ST: Y : = A OR B ; Y = A + B \qquad \text{ST: } Y := A \text{ OR } B; Y = A + B ST: Y := A OR B ;
B3 NOT (NC contact) Y = A ‾ ST: Y : = NOT A ; Y = \overline{A} \qquad \text{ST: } Y := \text{NOT } A; Y = A ST: Y := NOT A ;
B4 De Morgan A ⋅ B ‾ = A ‾ + B ‾ A + B ‾ = A ‾ ⋅ B ‾ \overline{A\cdot B} = \overline{A} + \overline{B} \qquad \overline{A + B} = \overline{A}\cdot\overline{B} A ⋅ B = A + B A + B = A ⋅ B
B5 XOR (exclusive OR, two-way switch) Y = A B ‾ + A ‾ B Y = A\overline{B} + \overline{A}B Y = A B + A B
B6 Motor latch in a PLC Q 0.0 = I 0.0 ( STOP, NC ) ⋅ ( I 0.1 ( START ) + Q 0.0 ) ⋅ I 0.2 ( OL 95-96, NC ) Q0.0 = I0.0_{(\text{STOP, NC})}\cdot(I0.1_{(\text{START})} + Q0.0)\cdot I0.2_{(\text{OL 95-96, NC})} Q 0.0 = I 0. 0 ( STOP, NC ) ⋅ ( I 0. 1 ( START ) + Q 0.0 ) ⋅ I 0. 2 ( OL 95-96, NC )
B7 Set/Reset with reset priority (R rung below) Q k + 1 = ( S + Q k ) ⋅ R ‾ Q_{k+1} = (S + Q_k)\cdot\overline{R} Q k + 1 = ( S + Q k ) ⋅ R
B8 Rising edge (one-shot) P ( A ) k = A k ⋅ A k − 1 ‾ N ( A ) k = A k ‾ ⋅ A k − 1 P(A)_k = A_k\cdot\overline{A_{k-1}} \qquad N(A)_k = \overline{A_k}\cdot A_{k-1} P ( A ) k = A k ⋅ A k − 1 N ( A ) k = A k ⋅ A k − 1
T1 TON — on-delay E T = { min ( E T + Δ t , P T ) I N = 1 0 I N = 0 Q = I N ∧ ( E T ≥ P T ) ET = \begin{cases} \min(ET + \Delta t,\ PT) & IN = 1 \\ 0 & IN = 0 \end{cases} \qquad Q = IN \wedge (ET \ge PT) ET = { min ( ET + Δ t , PT ) 0 I N = 1 I N = 0 Q = I N ∧ ( ET ≥ PT )
T2 TOF — off-delay Q = I N ∨ ( E T < P T ) where E T starts timing when I N : 1 → 0 , E T = 0 while I N = 1 Q = IN \vee (ET < PT) \quad \text{where } ET \text{ starts timing when } IN: 1 \to 0,\ ET = 0 \text{ while } IN = 1 Q = I N ∨ ( ET < PT ) where ET starts timing when I N : 1 → 0 , ET = 0 while I N = 1
T3 TP — fixed-length pulse Q = 1 during [ t 0 , t 0 + P T ) after a rising edge of I N at t 0 ( not retriggered during the pulse ) Q = 1 \ \text{during } [t_0,\ t_0 + PT) \text{ after a rising edge of } IN \text{ at } t_0 \ (\text{not retriggered during the pulse}) Q = 1 during [ t 0 , t 0 + PT ) after a rising edge of I N at t 0 ( not retriggered during the pulse )
T4 Software timer accuracy P T ≤ t a c t u a l ≤ P T + t s c a n + t b a s e PT \le t_{actual} \le PT + t_{scan} + t_{base} PT ≤ t a c t u a l ≤ PT + t sc an + t ba se
T5 Flasher from two timers T 1 = TON ( E N ∧ T 2 ‾ , t o n ) T 2 = TON ( T 1 , t o f f ) Q = E N ∧ T 1 ‾ ( T p e r i o d = t o n + t o f f ) T1 = \text{TON}(EN \wedge \overline{T2},\ t_{on}) \quad T2 = \text{TON}(T1,\ t_{off}) \quad Q = EN \wedge \overline{T1} \quad (T_{period} = t_{on} + t_{off}) T 1 = TON ( EN ∧ T 2 , t o n ) T 2 = TON ( T 1 , t o ff ) Q = EN ∧ T 1 ( T p er i o d = t o n + t o ff )
T6 CTU — up counter C V k + 1 = { 0 R = 1 C V k + 1 P ( C U ) C V k otherwise Q = ( C V ≥ P V ) CV_{k+1} = \begin{cases} 0 & R = 1 \\ CV_k + 1 & P(CU) \\ CV_k & \text{otherwise} \end{cases} \qquad Q = (CV \ge PV) C V k + 1 = ⎩ ⎨ ⎧ 0 C V k + 1 C V k R = 1 P ( C U ) otherwise Q = ( C V ≥ P V )
T7 CTD — down counter C V = P V on LD C V k + 1 = C V k − 1 at P ( C D ) Q = ( C V ≤ 0 ) CV = PV \text{ on LD} \qquad CV_{k+1} = CV_k - 1 \text{ at } P(CD) \qquad Q = (CV \le 0) C V = P V on LD C V k + 1 = C V k − 1 at P ( C D ) Q = ( C V ≤ 0 )
T8 Software counter limit f m a x ≈ 1 2 ( t s c a n + t i n ) f_{max} \approx \frac{1}{2\,(t_{scan} + t_{in})} f ma x ≈ 2 ( t sc an + t in ) 1
L1 Signed integer range − 2 n − 1 ≤ x ≤ 2 n − 1 − 1 n = 16 ⇒ − 32768 … 32767 -2^{n-1} \le x \le 2^{n-1} - 1 \qquad n = 16 \Rightarrow -32768 \ldots 32767 − 2 n − 1 ≤ x ≤ 2 n − 1 − 1 n = 16 ⇒ − 32768 … 32767
L2 Integer pitfalls in scaling 27648 × 10 27648 (INT overflows at the multiplication) 13824 27648 × 10 = 0 (division truncates before the multiplication) \frac{27648 \times 10}{27648} \;\text{(INT overflows at the multiplication)} \qquad \frac{13824}{27648}\times 10 = 0 \;\text{(division truncates before the multiplication)} 27648 27648 × 10 (INT overflows at the multiplication) 27648 13824 × 10 = 0 (division truncates before the multiplication)
M1 Run command Cmd = I 0.0 ⋅ I 0.2 ⋅ Fault ‾ ⋅ ( I 0.1 + Cmd ) \text{Cmd} = I0.0\cdot I0.2\cdot\overline{\text{Fault}}\cdot(I0.1 + \text{Cmd}) Cmd = I 0.0 ⋅ I 0.2 ⋅ Fault ⋅ ( I 0.1 + Cmd )
M2 Feedback discrepancy Fault ← TON ( Cmd ⊕ FB , t f b ) t f b ≈ 0.5 – 2 s \text{Fault} \leftarrow \text{TON}(\text{Cmd} \oplus \text{FB},\ t_{fb}) \qquad t_{fb} \approx 0.5\text{–}2\ \text{s} Fault ← TON ( Cmd ⊕ FB , t f b ) t f b ≈ 0.5 – 2 s
M3 Software interlock Q F = S 0 ‾ O L ‾ ( S F + Q F ) S R ‾ Q R ‾ F B R ‾ Q R = S 0 ‾ O L ‾ ( S R + Q R ) S F ‾ Q F ‾ F B F ‾ Q_F = \overline{S0}\,\overline{OL}\,(S_F + Q_F)\,\overline{S_R}\,\overline{Q_R}\,\overline{FB_R} \qquad Q_R = \overline{S0}\,\overline{OL}\,(S_R + Q_R)\,\overline{S_F}\,\overline{Q_F}\,\overline{FB_F} Q F = S 0 O L ( S F + Q F ) S R Q R F B R Q R = S 0 O L ( S R + Q R ) S F Q F F B F
M4 Star–delta sequence K Y = Run T Y ‾ K Δ ‾ K 1 = Run ( K Y + K 1 ) K Δ = Run TON ( T Y , t d e a d ) K Y ‾ F B Y ‾ K_Y = \text{Run}\,\overline{T_Y}\,\overline{K_\Delta} \quad K_1 = \text{Run}\,(K_Y + K_1) \quad K_\Delta = \text{Run}\,\text{TON}(T_Y,\ t_{dead})\,\overline{K_Y}\,\overline{FB_Y} K Y = Run T Y K Δ K 1 = Run ( K Y + K 1 ) K Δ = Run TON ( T Y , t d e a d ) K Y F B Y
S1 Transition rule X n + 1 ← 1 , X n ← 0 when X n ∧ t n → n + 1 X_{n+1} \leftarrow 1,\ X_n \leftarrow 0 \quad \text{when}\quad X_n \wedge t_{n\to n+1} X n + 1 ← 1 , X n ← 0 when X n ∧ t n → n + 1
S2 One active step ∑ i X i = 1 \sum_i X_i = 1 i ∑ X i = 1
S3 Outputs from steps Q j = ⋁ i ∈ A j X i ⋅ (enable condition) Q_j = \bigvee_{i \in A_j} X_i \cdot \text{(enable condition)} Q j = i ∈ A j ⋁ X i ⋅ (enable condition)
P1 Linear scaling y = y m i n + ( x − x m i n ) y m a x − y m i n x m a x − x m i n y = y_{min} + (x - x_{min})\,\frac{y_{max} - y_{min}}{x_{max} - x_{min}} y = y min + ( x − x min ) x ma x − x min y ma x − y min
P2 Resolution per raw count Δ y = y m a x − y m i n x m a x − x m i n e.g. 10 bar 27648 = 0.36 mbar \Delta y = \frac{y_{max} - y_{min}}{x_{max} - x_{min}} \qquad \text{e.g. } \frac{10\ \text{bar}}{27648} = 0.36\ \text{mbar} Δ y = x ma x − x min y ma x − y min e.g. 27648 10 bar = 0.36 mbar
P3 Signal validity (NAMUR NE 43) 3.8 ≤ I ≤ 20.5 mA: valid measurement I ≤ 3.6 or I ≥ 21 mA → fault 3.8 \le I \le 20.5\ \text{mA: valid measurement} \qquad I \le 3.6 \text{ or } I \ge 21\ \text{mA → fault} 3.8 ≤ I ≤ 20.5 mA: valid measurement I ≤ 3.6 or I ≥ 21 mA → fault
P4 PID (standard form) u ( t ) = K p ( e + 1 T i ∫ 0 t e d τ + T d d e d t ) e = S P − P V u(t) = K_p\left(e + \frac{1}{T_i}\int_0^t e\,d\tau + T_d\,\frac{de}{dt}\right) \qquad e = SP - PV u ( t ) = K p ( e + T i 1 ∫ 0 t e d τ + T d d t d e ) e = SP − P V
t s t_s t s ) analog · pid · vfd u_k = k_p left (e_k + frac {t_s}{t_i} sum _{j=0}^{k} e_j - frac {t_d}{t_s}(pv_k - pv_{k-1}) right ) ">P5 Discrete PID (sample time T s T_s T s ) u k = K p ( e k + T s T i ∑ j = 0 k e j − T d T s ( P V k − P V k − 1 ) ) u_k = K_p\left(e_k + \frac{T_s}{T_i}\sum_{j=0}^{k} e_j - \frac{T_d}{T_s}(PV_k - PV_{k-1})\right) u k = K p ( e k + T i T s j = 0 ∑ k e j − T s T d ( P V k − P V k − 1 ) )
P6 Frequency setpoint over Modbus Reg = f 0.01 Hz ( 35.5 Hz → 3550 ) or Reg = f f m a x × Scale 100 % \text{Reg} = \frac{f}{0.01\ \text{Hz}} \quad (35.5\ \text{Hz} \to 3550) \qquad \text{or} \quad \text{Reg} = \frac{f}{f_{max}}\times \text{Scale}_{100\%} Reg = 0.01 Hz f ( 35.5 Hz → 3550 ) or Reg = f ma x f × Scale 100%
K1 Stop categories Cat 0: remove power immediately Cat 1: controlled stop, then remove power Cat 2: controlled stop, power kept on \text{Cat 0: remove power immediately} \qquad \text{Cat 1: controlled stop, then remove power} \qquad \text{Cat 2: controlled stop, power kept on} Cat 0: remove power immediately Cat 1: controlled stop, then remove power Cat 2: controlled stop, power kept on
K2 PL / SIL by dangerous failure rate PL d ≈ SIL 2 : 10 − 7 ≤ P F H D < 10 − 6 PL e ≈ SIL 3 : 10 − 8 ≤ P F H D < 10 − 7 \text{PL d} \approx \text{SIL 2}: 10^{-7} \le PFH_D < 10^{-6} \qquad \text{PL e} \approx \text{SIL 3}: 10^{-8} \le PFH_D < 10^{-7} PL d ≈ SIL 2 : 1 0 − 7 ≤ PF H D < 1 0 − 6 PL e ≈ SIL 3 : 1 0 − 8 ≤ PF H D < 1 0 − 7
K3 Minimum safety distance (ISO 13855) S = K T + C K = 2000 mm/s (if S ≤ 500 mm) , 1600 mm/s (otherwise) C = 8 ( d − 14 ) mm , d ≤ 40 mm S = K\,T + C \qquad K = 2000\ \text{mm/s (if } S \le 500\ \text{mm)},\ 1600\ \text{mm/s (otherwise)} \qquad C = 8(d - 14)\ \text{mm},\ d \le 40\ \text{mm} S = K T + C K = 2000 mm/s (if S ≤ 500 mm) , 1600 mm/s (otherwise) C = 8 ( d − 14 ) mm , d ≤ 40 mm
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Standards and references
IEC 61131-1 (overview) · IEC 61131-2 (hardware, 24 VDC input types) · IEC 61131-3 (programming languages)
IEC 60204-1 (electrical equipment of machines, stop categories) · ISO 13849-1 / IEC 62061 (functional safety of machinery)
IEC 60848 (GRAFCET) · Modbus Application Protocol Specification (Modbus Organization)
F. D. Petruzella, Programmable Logic Controllers · W. Bolton, Programmable Logic Controllers · PLC manufacturers' manuals
Frequently asked questions What should I know before learning PLCs? You should understand contactor control circuits (self-holding, interlocks, timers), because ladder logic is designed to read like a relay circuit, and basic 24 VDC and 230 VAC electrics so you can wire I/O correctly. All of this is covered in the motor-control course on this site.
Which PLC brand should I start with? The principles are the same for every brand because they follow IEC 61131. Choose a brand used in the factories or schools near you, and one with free software and a simulator. In this region Mitsubishi, Omron, Siemens, Delta, Schneider, Rockwell and Keyence are common.
How is a PLC different from an Arduino or a microcontroller? A PLC is designed for the factory environment: noise-immune, isolated 24 VDC I/O, a predictable scan, self-diagnostics, standardised languages, modules that can be serviced and replaced in use, and certification to industrial standards. A microcontroller is more flexible and cheaper, but the user has to build all that robustness themselves.
Mod
Ajarn Mod · Teerawut Savangboon Lecturer in Electrical Engineering, Dhonburi Rajabhat University, Samut Prakan · Profile